Field of the Invention
The present invention relates to a chip component-embedded resin multilayer substrate and a manufacturing method thereof.
Description of the Related Art
In recent years, various electronic devices such as a mobile communication terminal and a notebook PC are being made to have higher performance and smaller size, and accordingly, various function circuits to be embedded in electronic devices are being made into a modular component.
As such modular component, for example, PTD 1 (Japanese Patent Laying-Open No. 2006-073763) and PTD 2 (Japanese Patent Laying-Open No. 2008-141007) disclose a chip component-embedded resin multilayer substrate in which a chip component is embedded in a rein multilayer substrate obtained by laminating a plurality of thermoplastic resin layers.
When embedding a chip component such as a chip capacitor in the resin multilayer substrate, it is necessary to have an open space disposed in the resin layers for housing the chip component. In order to prevent the chip component from being caught somewhere while housing the chip component, the dimensions of the open space are made slightly greater (with a clearance) than the dimensions of the chip component. As a result, as illustrated in FIG. 1(a), a gap 100 is formed between a side surface of a chip component 5 and resin layers 1.
In the case where a wiring conductor 21 has been formed in the vicinity of gap 100, when a laminating body obtained by laminating resin layers 1 is thermo-compressed, the flowing of the resin as indicated by arrows in FIG. 1(a) may cause wiring conductors 21a and 21b to be deformed as shown in FIG. 1 (b). In some cases, wiring conductors 21a and 21b may accidentally contact (short-circuit) side terminal electrodes 51 of chip component 5.
PTD 1: Japanese Patent Laying-Open No. 2006-073763
PTD 2: Japanese Patent Laying-Open No. 2008-141007